FPGA Fiber Optic Communication Testing

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This paper presents an effective approach designed to ad-dress challenges associated with the testing, parameter tun-ing and performance monitoring of optical interconnects in FPGA-based systems. Targeting fiber-optic communication systems, the Fiber-on-Chip (FoC) emulation approach considers not only the receiver DSP to be verified, but it additionally emulates both transmitter and communication channel so that a complete end-to-end commu-nication system is integrated in an FPGA or ASIC. Gothenburg, Sweden 2017 The Author grants to Chalmers University of Technology and University of Gothenburg the non-exclusive right to publish the Work electronically and in a non-commercial purpose make it accessible on the Internet. Efficient implementation of digital signal processing (DSP) algorithms is critical to the advancement of high-speed fiber-optic communication systems. However, as these systems become more complex, the effort spent on test and characterization of the implementation can become prohibitively large.

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FPGA Fiber Optic Communication Testing

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